DVCon U.S. 2026 Announces Conference Program & Panel Focused on AI and its Potential Role in Ending the Verification Bottleneck

GAINESVILLE, Fla., Jan. 27, 2026 (GLOBE NEWSWIRE) -- The 2026 Design and Verification Conference and Exhibition (DVCon U.S.), sponsored by Accellera Systems Initiative, today announced the full conference program for attendees, including a panel that will address if AI is the key to solving the verification bottleneck. DVCon U.S. will take place March 2-5, 2026, at its new venue, the Hyatt Regency Santa Clara.

“We’re thrilled to welcome the design and verification community to our new venue this year,” said Xiaolin Chen, DVCon U.S. 2026 General Chair. “DVCon U.S. 2026 features an exciting, forward-looking program that spans AI and its impact on design and verification, as well as practical, real-world applications of today’s products and standards. Beyond the technical depth, attendees can expect a highly engaging experience with many opportunities to connect with peers, exchange ideas, and learn directly from industry experts.”

Wednesday morning’s panel will explore "Is AI the Key to Ending the Verification Bottleneck?" This panel will bring together leaders in AI, EDA, and semiconductor design to debate whether AI is truly the key to ending the verification bottleneck or just the next over-hyped technology. The core question to be addressed during the discussion is, “Can AI and LLM-powered assistants fundamentally change the verification equation, or will bottlenecks simply move elsewhere?” The session will be moderated by Vishal Karna, Senior Director of Engineering, Qualcomm Technologies.

The conference program offers attendees a wide selection of workshops, tutorials, posters, and technical papers. Monday and Thursday will feature tutorials and workshops, while Tuesday and Wednesday will showcase in-depth technical paper sessions and posters. Additionally, the exhibition will be open on Monday afternoon, as well as Tuesday and Wednesday, providing attendees with the chance to explore the latest tools and technologies from leading companies.

Attendees will also have the opportunity to hear from two keynote sessions:

• The Tuesday, March 3 Industry Keynote: “Verification, Validation and HW/SW Challenges with Complex Chiplet-based Systems,” will be presented by Abhi Kolpekwar, Senior Vice President, Digital Verification Technology at Siemens EDA and Jean-Marie Brunet, Senior Vice President, Hardware Assisted Verification at Siemens EDA. They will be joined by a customer co-presenter to be announced later.
  
  
• Stuart Oberman, vice president of GPU hardware engineering at NVIDIA, will present the invited keynote on Wednesday, March 4, “From Pixels to Tokens: Chip Design and Verification in the Era of AI.”
  

Registration is open. Registration for the keynotes, panel, and exhibits is free.

For inspiration and to view proceedings from past conferences, visit the archives site.

About DVCon
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP), and electronic design automation (EDA) companies. For more information about Accellera, please visit www.accellera.org. For more information about DVCon U.S., visit the DVCon U.S. website. Follow DVCon U.S. on Facebook, LinkedIn or @dvcon_us on X, or to comment, please use #dvcon_us.

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